1 on - Chip Interconnection Networks
نویسنده
چکیده
My main research is on asynchronous and mixed-timing digital design. Asynchronous circuits have no centralized or global clock. Instead, they are distributed hardware systems where multiple components coordinate and synchronize at their own rate on communication channels. As chips grow increasing larger and faster, power and design-time requirements become more aggressive, and timing variability becomes a critical factor, there are increasing challenges in assembling centrally-controlled synchronous systems. My key goal is to make asynchronous digital design a viable option.
منابع مشابه
A Review of Optical Routers in Photonic Networks-on-Chip: A Literature Survey
Due to the increasing growth of processing cores in complex computational systems, all the connection converted bottleneck for all systems. With the protection of progressing and constructing complex photonic connection on chip, optical data transmission is the best choice for replacing with electrical interconnection for the reason of gathering connection with a high bandwidth and insertion lo...
متن کاملA Routing-Aware Simulated Annealing-based Placement Method in Wireless Network on Chips
Wireless network on chip (WiNoC) is one of the promising on-chip interconnection networks for on-chip system architectures. In addition to wired links, these architectures also use wireless links. Using these wireless links makes packets reach destination nodes faster and with less power consumption. These wireless links are provided by wireless interfaces in wireless routers. The WiNoC archite...
متن کاملA Generic Traffic Model for On-Chip Interconnection Networks
On-chip interconnection networks or Network-onChips (NoCs) are becoming the de-facto scaling communication techniques in Multi-Processor System-on-Chip (MPSoC) or Chip Multiprocessor (CMP) environment. However, the current traffic models for on-chip interconnection networks are insufficient to capture the traffic characteristics as well as evaluate the network performance. As the technology sca...
متن کاملNanophotonic On-Chip Interconnection Networks for Energy-Performance Optimized Computing
1. Introduction Much recent progress in silicon nanophotonic technology has enabled the prospect of high-performance nano-photonic networks-on-chip (NoCs), which have become very attractive solutions to the growing bandwidth and power consumption challenges of future high-performance chip multiprocessors [1–4]. The design of our high-performance nanophotonic NoC commences at the individual sili...
متن کاملCost-aware Topology Customization of Mesh-based Networks-on-Chip
Nowadays, the growing demand for supporting multiple applications causes to use multiple IPs onto the chip. In fact, finding truly scalable communication architecture will be a critical concern. To this end, the Networks-on-Chip (NoC) paradigm has emerged as a promising solution to on-chip communication challenges within the silicon-based electronics. Many of today’s NoC architectures are based...
متن کاملGeneralized Wavelength Routed Optical Micronetwork in Network-on-chip
The wavelength routed optical network (WRON) [1] is a promising optical interconnection architecture that can be integrated into a System-on-Chip (SoC) to replace traditional wire-connected on-chip micro-networks which pose severe bandwidth limitations on future super large SoC chips. In this paper, we present the architecture of WRON and generalize the routing schemes based on source address, ...
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